As semiconductor memory devices have recently become more integrated and varied, IC cards using EEPROM devices have accordingly become widely employed. The IC cards have secrecy, security, and data processing and management functions superior to magnetic cards and so their applied fields are spreading rapidly. In the past, two chips, namely microcomputer and EEPROM chips, were used in IC cards. Now, products having microcomputers and EEPROMs in a single chip are being produced and products adding functions necessary in the applied fields and reducing fabrication cost are being studied.
Usually, to preserve secrecy, EEPROMs used in IC cards are able to store a specific secret access code entered by the user and the secret access code needs to be entered twice in order to prevent errors from occurring when the secret access code is entered or changed.
Accordingly, the conventional EEPROM as shown in FIG. 1 comprises a data input buffer 10 connected to an input terminal Din, two registers 12 and 14, a comparator 16, a memory cell array 18 and extra cells 20 in which to store the secret access code. In the conventional EEPROM, to initially define the secret access code, the secret access code is inputted twice in series via the data input buffer 10 with the first secret access code going into A register 12 and the second into B register 14. The comparator 16 compares the secret access codes inputted into A register 12 and B register 14. If the secret access codes do not match, an error signal is produced and if they do, a security mode is defined by writing the inputted secret access code in the extra cells 20. After the security mode is defined, if the inputted secret access code and a previously stored secret access code match, an authorized user is recognized and the next instruction can be performed. If the codes do not match, an error signal is produced recognizing an unauthorized user.
Meanwhile, the defined secret access code is changed by the following process. A previously defined secret access code that is already stored in extra cells 20, is inputted into A register 12. Also, the old secret access code entered by the user, is inputted into B register 14 via data input buffer 10. Then, the secret access codes in A and B registers 12 and 14 are compared in comparator 16. If the codes do not match, an error signal is generated and if the codes match, the user can define a new access code. A new access code entered by the user is then inputted into A register 12 and the new access code is again inputted into B register 14 for confirmation. After that, the new access codes are compared in comparator 16. If they do not match, an error signal is generated and if the codes match, definition of the new access code is completed.
As described above, the chip is overly large and when the secret access code is written or changed, the signal control is overly complex because the conventional EEPROM comprises two registers or a latch for comparing the two secret access codes and extra cells 20, provided inside an EEPROM chip, for writing the secret access code in addition to memory cell array 18.